Ultrafast MRAM strategies for cache applications and beyond

Time: Thursday, October 25th, 11:40
Speaker: Lucian PREJBEANU, INAC

Spin transfer torque MRAM (STT-MRAM) are considered as one of the most promising technology for non-volatile RAM due to their non-volatility, quasi-infinite endurance, speed and high-density. In standard STT-MRAM, particularly the in-plane magnetized ones, the switching dynamics of the storage layer magnetization is characterized by an incubation delay that can take up to a few nanoseconds. This is because the spin transfer torque is initially zero at the onset of the write current, since at equilibrium the storage layer magnetization and spin-current polarization are parallel or antiparallel. The magnetization reversal is actually triggered by thermal fluctuations which makes the switching stochastic. Consequently, it is necessary to increase the write pulse duration and/or its amplitude to reach sufficiently low write error rates (for instance lower than 10-11). This is detrimental for the realization of short access time memory such as SRAM-like used for Cache applications, which means that addressing fast switching memories, as SRAM replacement in cache or beyond, up to the processor, it is mandatory to deploy new ultrafast writing strategies. Therefore, we present in this study three MRAM writing strategies allowing to greatly improve the write speed down to the sub-nanosecond range.
First, we demonstrate that sub-ns switching with final state determined by the current polarity through the stack can be achieved in STT-MRAM cells comprising two spin-polarizing layers having orthogonal magnetic anisotropies. Two solutions were found and demonstrated : one consists in increasing the cell aspect ratio, the other consists in applying a static transverse field on the cells, the second one being preferred since it does not require to increase the footprint of the cell.
Second, we have shown that the write stochasticity can be almost completely suppressed and the writing speed greatly increased by inducing an oblique anisotropy (also called easy-cone anisotropy) in the storage layer [7]. This means that, at equilibrium, the storage layer magnetization, instead of being aligned along the normal to the plane of the layer, lies along any direction on a cone of axis normal to the plane. In contrast, the reference layer is designed to keep its perpendicular anisotropy. Thanks to this easy cone anisotropy, the storage and reference layer magnetizations always keep a relative angle so that upon write, the storage layer magnetization reversal can be triggered at the very onset of the write current pulse. This quadratic anisotropy itself results from spatial fluctuations of uniaxial anisotropy which can be induced during deposition and annealing of the magnetic tunnel junction stacks. Thanks to this easy cone anisotropy, the writing is much more reproducible and can be faster and/or realized at lower write voltage thereby reducing the write energy consumption).
Third, we recently demonstrated the first proof of concept of a perpendicular Spin orbit torque (SOT)-MRAM. SOT-RAM combining high speed, non-volatility and potentially infinite endurance while being compatible with technological nodes below 22nm and as such appears as a strong candidate for future non-volatile cache memory. In SOT-MRAM, whose write can be achieved with sub-ns pulses, we have shown that the inclusion of SOT-MRAM at the L1-instruction cache and L2-cache can reduce the energy consumption of processors by 60% while solving radiation induced soft errors of SRAM-only configuration.